2778 search results - page 494 / 556 » Reuse Technique in Hardware Design |
ICCAD
2006
IEEE
14 years 5 months ago
2006
IEEE
Soft errors in logic are emerging as a significant reliability problem for VLSI designs. This paper presents novel circuit optimization techniques to mitigate soft error rates (SE...
ISQED
2010
IEEE
14 years 3 months ago
2010
IEEE
—Double patterning lithography (DPL) provides an attractive alternative or a supplementary method to enable the 32nm and 22nm process nodes, relative to costlier technology optio...
SASP
2009
IEEE
14 years 3 months ago
2009
IEEE
—This paper describes a multi-threaded parallel design and implementation of the Smith-Waterman (SM) algorithm on compute unified device architecture (CUDA)-compatible graphic pr...
IDEAS
2008
IEEE
14 years 2 months ago
2008
IEEE
This paper proposes WIDS, a wireless intrusion detection system, which applies data mining clustering technique to wireless network data captured through hardware sensors for purp...
CODES
2007
IEEE
14 years 2 months ago
2007
IEEE
In this paper we present an approach to the scheduling and voltage scaling of low-power fault-tolerant hard real-time applications mapped on distributed heterogeneous embedded sys...