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» Reuse Technique in Hardware Design
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CODES
2007
IEEE
13 years 11 months ago
Energy efficient co-scheduling in dynamically reconfigurable systems
Energy consumption is a major issue in dynamically reconfigurable systems because of the high power requirements during repeated configurations. Hardware designs employ low power ...
Pao-Ann Hsiung, Pin-Hsien Lu, Chih-Wen Liu
DATE
2000
IEEE
88views Hardware» more  DATE 2000»
13 years 11 months ago
Techniques for Reducing Read Latency of Core Bus Wrappers
Today’s system-on-a-chip designs consist of many cores. To enable cores to be easily integrated into different systems, many propose creating cores with their internal logic sep...
Roman L. Lysecky, Frank Vahid, Tony Givargis
PAKM
2000
13 years 8 months ago
Knowledge Re-Use as Engineering Re-Use: Extracting Values from Knowledge Management
This paper presents a knowledge-sharing framework for achieving effective knowledge reuse within industrial organisations. This knowledge re-use paradigm goes beyond traditional e...
Christopher Yeung, Tony Holden
ISLPED
1998
ACM
102views Hardware» more  ISLPED 1998»
13 years 11 months ago
Low power methodology and design techniques for processor design
J. Patrick Brennan, Alvar Dean, Stephan Kenyon, Se...
ICECCS
2002
IEEE
99views Hardware» more  ICECCS 2002»
14 years 9 days ago
Using Role-Based Modeling Language (RBML) to Characterize Model Families
Cost-effective development of large, integrated computer-based systems can be realized through systematic reuse of development experiences throughout the development process. In t...
Dae-Kyoo Kim, Robert B. France, Sudipto Ghosh, Eun...