Sciweavers

    2778 search results - page 9 / 556
    » Reuse Technique in Hardware Design
    Sort
    View
    FPL
    2010
    Springer
    106views Hardware» more  FPL 2010»
    Increasing Design Productivity through Core Reuse, Meta-data Encapsulation, and Synthesis
    15 years 3 months ago
    Increasing Design Productivity through Core Reuse, Meta-data Encapsulation, and Synthesis
    Download  www.chrec.org
    This paper presents a novel IP core reuse strategy which reduces design time from days to hours for communication circuits such as digital radio receivers. This design productivity...
    Adam Arnesen, Kevin Ellsworth, Derrick Gibelyou, T...
    claim paper
    Read More »
    ICCAD
    2006
    IEEE
    96views Hardware» more  ICCAD 2006»
    Technology migration techniques for simplified layouts with restrictive design rules
    16 years 2 months ago
    Technology migration techniques for simplified layouts with restrictive design rules
    Download  www.cecs.uci.edu
    Xiaoping Tang, Xin Yuan
    claim paper
    Read More »
    150
    Voted
    ISCAS
    2002
    IEEE
    737views Hardware» more  ISCAS 2002»
    Gate-diffusion input (GDI) - a technique for low power design of digital circuits: analysis and characterization
    15 years 10 months ago
    Gate-diffusion input (GDI) - a technique for low power design of digital circuits: analysis and characterization
    Download  webee.technion.ac.il
    Arkadiy Morgenshtein, Alexander Fish, Israel A. Wa...
    claim paper
    Read More »
    91
    Voted
    DATE
    2000
    IEEE
    82views Hardware» more  DATE 2000»
    An Integrated Temporal Partitioning and Partial Reconfiguration Technique for Design Latency Improvement
    15 years 10 months ago
    An Integrated Temporal Partitioning and Partial Reconfiguration Technique for Design Latency Improvement
    Download  www.date-conference.com
    Satish Ganesan, Ranga Vemuri
    claim paper
    Read More »
    ASPDAC
    2008
    ACM
    85views Hardware» more  ASPDAC 2008»
    A design- for-diagnosis technique for diagnosing both scan chain faults and combinational circuit faults
    15 years 7 months ago
    A design- for-diagnosis technique for diagnosing both scan chain faults and combinational circuit faults
    Download  test.ict.ac.cn
    Fei Wang, Yu Hu, Huawei Li, Xiaowei Li
    claim paper
    Read More »
    Explore & Download
    Proceedings Preprints Top 5 Ranked Papers Publications Books Software Tutorials Presentations Lectures Notes Datasets
    Productivity Tools
    i2PDF i2Img i2Text i2OCR i2Symbol i2Type i2Speak i2Style i2Arabic i2Bopomo Latex Equation Editor
    Sciweavers
    About Community Cookies Privacy Policy Terms of Use

    Copyright © Sciweavers LLC, 2009-2026, USA.