We present a novel approach which facilitates formal verification of component-based software application families using model checking. This approach enables effective composition...
Vertex cache of programmable geometry processor The proposed architecture of vertex cache is divided into is proposed and implemented. The proposed vertex cache is pre-TnL vertex c...
—We investigate the problem of memory reuse in order to reduce the memory needed to store an array variable. We develop techniques that can lead to smaller memory requirements in...
The design of virtual workplaces that can support virtual work processes has traditionally been either ad-hoc, or has been influenced by the top-down approaches, such as ‘virtua...
—This paper presents a memory-conscious mapping methodology of computational intensive applications on coarse-grain reconfigurable arrays. By exploiting the inherent abundant amo...
Michalis D. Galanis, Gregory Dimitroulakos, Consta...