167 search results - page 11 / 34 » Robust Techniques for Watermarking Sequential Circuit Design... |
ICCAD
2008
IEEE
14 years 1 months ago
2008
IEEE
This paper presents ISCLEs, a novel and robust analog design method that promises to scale with Moore’s Law, by doing boosting-style importance sampling on digital-sized circuit...
ICSE
2007
IEEE-ACM
14 years 7 months ago
2007
IEEE-ACM
The Alloy tool-set has been gaining popularity as an alternative to traditional manual testing and checking for design correctness. Alloy uses a first-order relational logic for m...
ASPDAC
2000
ACM
13 years 12 months ago
2000
ACM
Many intellectual property protection (IPP) techniques have been proposed. Their primary objectives are providing convincible proof of authorship with least degradation of the qua...
ICCAD
2004
IEEE
14 years 4 months ago
2004
IEEE
We present techniques for improving the accuracy of geometric-programming (GP) based analog circuit design optimization. We describe major sources of discrepancies between the res...
ET
2000
13 years 7 months ago
2000
The paper presents a novel hierarchical approach to test pattern generation for sequential circuits based on an input model of mixed-level decision diagrams. A method that handles,...