167 search results - page 14 / 34 » Robust Techniques for Watermarking Sequential Circuit Design... |
DAC
2006
ACM
14 years 1 months ago
2006
ACM
In this paper, we propose a novel technique on mining relationships in a sequential circuit to discover global constraints. In contrast to the traditional learning methods, our mi...
VLSID
2002
IEEE
14 years 7 months ago
2002
IEEE
Deep submicron technology calls for new design techniques, in which wire and gate delays are accounted to have equal or nearly equal effect on circuit behavior. Asynchronous speed...
SBCCI
2003
ACM
14 years 22 days ago
2003
ACM
Recycling was recently proposed as a system-level design technique to facilitate the building of complex System-on-Chips (SOC) by assembling pre-designed components. Recycling all...
DATE
2008
IEEE
14 years 1 months ago
2008
IEEE
Metallic Carbon Nanotubes (CNTs) create source-drain shorts in Carbon Nanotube Field Effect Transistors (CNFETs), causing excessive leakage, degraded noise margin and delay variat...
DSN
2003
IEEE
14 years 23 days ago
2003
IEEE
This paper describes the design and evaluation of a robust integrator for software-implemented control systems. The integrator is constructed as a generic component in the Simulin...