167 search results - page 21 / 34 » Robust Techniques for Watermarking Sequential Circuit Design... |
ICCAD
2009
IEEE
13 years 5 months ago
2009
IEEE
With increasing process variation, binning has become an important technique to improve the values of fabricated chips, especially in high performance microprocessors where transpa...
GLVLSI
2005
IEEE
14 years 1 months ago
2005
IEEE
Robustness of high fan-in domino circuits is degraded by technology scaling due to exponential increase in leakage. In this paper, we propose a new domino circuit for high fan-in ...
PATMOS
2007
Springer
14 years 1 months ago
2007
Springer
Abstract. The continuous miniaturization of semiconductor devices imposes serious threats to design robustness against process variations and environmental fluctuations. Modern ci...
DFT
2008
IEEE
14 years 2 months ago
2008
IEEE
Nanoelectronic components are expected to suffer from very high error rates, implying the need for hardening techniques. We propose a fine-grained approach to harden a promising...
ICCD
1996
IEEE
13 years 11 months ago
1996
IEEE
For circuits where there may be latches with no reset line, we show how to replace some of them with combinational logic. All previous work in sequential optimization by latch rem...