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» Robust Techniques for Watermarking Sequential Circuit Design...
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ACSD
2010
IEEE
224views Hardware» more  ACSD 2010»
13 years 5 months ago
Robustness of Sequential Circuits
Digital components play a central role in the design of complex embedded systems. These components are interconnected with other, possibly analog, devices and the physical environm...
Laurent Doyen, Thomas A. Henzinger, Axel Legay, De...
DAC
1998
ACM
14 years 8 months ago
Robust IP Watermarking Methodologies for Physical Design
Increasingly popular reuse-based design paradigms create a pressing need for authorship enforcement techniques that protect the intellectual property rights of designers. We devel...
Andrew B. Kahng, Stefanus Mantik, Igor L. Markov, ...
ASPDAC
2000
ACM
83views Hardware» more  ASPDAC 2000»
13 years 11 months ago
Low-power design of sequential circuits using a quasi-synchronous derived clock
– This paper presents a novel circuit design technique to reduce the power dissipation in sequential circuits by generating a quasi-synchronous derived clock from the master cloc...
Xunwei Wu, Jian Wei, Massoud Pedram, Qing Wu
ICMCS
2006
IEEE
168views Multimedia» more  ICMCS 2006»
14 years 1 months ago
The Watermarking for 3D CAD Drawing using Line, ARC, 3DFACE Components
Currently there has been much interested in developing the watermarking for 3D graphic data of mesh model or NURBS. However, the watermarking technique based on 3D CAD drawing lea...
Ki-Ryong Kwon, Jae-Sik Sohn, Young Huh, Suk Hwan L...
DATE
2009
IEEE
202views Hardware» more  DATE 2009»
14 years 2 months ago
Design as you see FIT: System-level soft error analysis of sequential circuits
Soft errors in combinational and sequential elements of digital circuits are an increasing concern as a result of technology scaling. Several techniques for gate and latch hardeni...
Daniel Holcomb, Wenchao Li, Sanjit A. Seshia