167 search results - page 5 / 34 » Robust Techniques for Watermarking Sequential Circuit Design... |
EH
2002
IEEE
14 years 12 days ago
2002
IEEE
Evolutionary algorithms (EAs) are regularly used both for the solution of scheduling problems, and for the creation of digital circuit designs. This paper describes a unified app...
DFT
2003
IEEE
14 years 23 days ago
2003
IEEE
We describe a method for designing fault tolerant circuits based on an extension of a Concurrent Error Detection (CED) technique. The proposed extension combines parity check code...
ICCD
2008
IEEE
14 years 4 months ago
2008
IEEE
- This paper performs analysis and design of latches and flip-flops while considering the effect of event upsets caused by energetic particle hits. First it is shown that the conve...
CCS
2001
ACM
13 years 12 months ago
2001
ACM
We describe a software self-checking mechanism designed to improve the tamper resistance of large programs. The mechanism consists of a number of testers that redundantly test for ...
GLVLSI
2003
IEEE
14 years 23 days ago
2003
IEEE
FPGAs, because of their re-programmability, are becoming very popular for creating and exchanging VLSI intellectual properties (IPs) in the reuse-based design paradigm. Existing w...