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VTS
2008
IEEE
104views Hardware» more  VTS 2008»
14 years 1 months ago
Signature Rollback - A Technique for Testing Robust Circuits
Dealing with static and dynamic parameter variations has become a major challenge for design and test. To avoid unnecessary yield loss and to ensure reliable system operation a ro...
Uranmandakh Amgalan, Christian Hachmann, Sybille H...
DAC
1999
ACM
14 years 8 months ago
Robust FPGA Intellectual Property Protection Through Multiple Small Watermarks
A number of researchers have proposed using digital marks to provide ownership identification for intellectual property. Many of these techniques share three specific weaknesses: ...
John Lach, William H. Mangione-Smith, Miodrag Potk...
DATE
2009
IEEE
107views Hardware» more  DATE 2009»
13 years 11 months ago
Sequential logic rectifications with approximate SPFDs
In the digital VLSI cycle, logic transformations are often required to modify the design to meet different synthesis and optimization goals. Logic transformations on sequential ci...
Yu-Shen Yang, Subarna Sinha, Andreas G. Veneris, R...
INTEGRATION
2010
172views more  INTEGRATION 2010»
13 years 6 months ago
Analog circuits optimization based on evolutionary computation techniques
1 — This paper presents a new design automation tool based on a modified genetic algorithm kernel, in order to increase efficiency on the analog circuit and system design cycle. ...
Manuel F. M. Barros, Jorge Guilherme, Nuno Horta
DSD
2009
IEEE
111views Hardware» more  DSD 2009»
14 years 2 months ago
Robustness Check for Multiple Faults Using Formal Techniques
Feature sizes in VLSI circuits are steadily shrinking. This results in increasing susceptibility to soft errors, e.g. due to environmental radiation. Precautions against soft error...
Stefan Frehse, Görschwin Fey, André S&...