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» Robustness of Sequential Circuits
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ICCAD
2007
IEEE
165views Hardware» more  ICCAD 2007»
14 years 16 days ago
Automated refinement checking of concurrent systems
Stepwise refinement is at the core of many approaches to synthesis and optimization of hardware and software systems. For instance, it can be used to build a synthesis approach for...
Sudipta Kundu, Sorin Lerner, Rajesh Gupta
CASES
2008
ACM
13 years 10 months ago
Compiling custom instructions onto expression-grained reconfigurable architectures
While customizable processors aim at combining the flexibility of general purpose processors with the speed and power advantages of custom circuits, commercially available process...
Paolo Bonzini, Giovanni Ansaloni, Laura Pozzi
ASPDAC
2005
ACM
78views Hardware» more  ASPDAC 2005»
13 years 10 months ago
Timing driven track routing considering coupling capacitance
Abstract— As VLSI technology enters the ultra-deep submicron era, wire coupling capacitance starts to dominate self capacitance and can no longer be neglected in timing driven ro...
Di Wu, Jiang Hu, Min Zhao, Rabi N. Mahapatra
CORR
2010
Springer
198views Education» more  CORR 2010»
13 years 8 months ago
Space and the Synchronic A-Ram
Space is a spatial programming language designed to exploit the massive parallelism available in a formal model of computation called the Synchronic A-Ram, and physically related ...
Alexander Victor Berka
TCAD
1998
91views more  TCAD 1998»
13 years 8 months ago
Cost-free scan: a low-overhead scan path design
Conventional scan design imposes considerable area and delay overhead by using larger scan ip- ops and additional scan wires without utilizing the functionality of the combinatio...
Chih-Chang Lin, Malgorzata Marek-Sadowska, Mike Ti...