We use a formal tool to extract Finite State Machines (FSM) based representations (lists of states and transitions) of sequential circuits described by flip-flops and gates. The...
This article is set in the eld of regulation networks modeled by discrete dynamical systems. It focuses on Boolean automata networks. In such networks, there are many ways to upd...
We describe a highly accurate but e cient fault simulator for interconnect opens, based on characterizing the standard cell library with SPICE; using transistor charge equations f...
Traditional timing-driven placement considers only combinational delays and does not take into account the potential of subsequent sequential optimization steps. As a result, the ...
— The problem of minimizing dynamic power consumption by scaling down the supply voltage of computational elements off critical paths is widely addressed in the literature for th...