Ultra-deep submicron manufacturability impacts physical design (PD) through complex layout rules and large guardbands for process variability; this creates new requirements for ne...
Statistical static timing analysis (SSTA) plays a key role in determining performance of the VLSI circuits implemented in state-of-the-art CMOS technology. A pre-requisite for emp...
Power minimization is a serious issue in wireless sensor networks to extend the lifetime and minimize costs. However, in order to gain an accurate understanding of issues regardin...
: Linear Parameter Varying(LPV) systems appear in a form of LTI state space representations where the elements of the A(ρ), B(ρ), C(ρ) matrices can depend on an unknown but at a...
—The clock distribution network is a key component of any synchronous VLSI design. High power dissipation and pressure volume temperature-induced variations in clock skew have st...
Ganesh Venkataraman, Jiang Hu, Frank Liu, Cliff C....