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» Route Packets, Not Wires: On-Chip Interconnection Networks
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SLIP
2005
ACM
14 years 2 months ago
A 3-D FPGA wire resource prediction model validated using a 3-D placement and routing tool
The interconnection architecture of FPGAs such as switches dominates performance of FPGAs. Three-dimensional integration of FPGAs overcomes interconnect limitations by allowing in...
Young-Su Kwon, Payam Lajevardi, Anantha P. Chandra...
SLIP
2004
ACM
14 years 2 months ago
Interconnect-power dissipation in a microprocessor
Interconnect power is dynamic power dissipation due to switching of interconnection capacitances. This paper describes the characterization of interconnect power in a state-of-the...
Nir Magen, Avinoam Kolodny, Uri C. Weiser, Nachum ...
LCN
2002
IEEE
14 years 1 months ago
A First Look at Wired Sensor Networks for Video Surveillance Systems
Sensor networks are a major new area of research. Some sensor applications, such as video surveillance, will need to be tethered for reasons of bandwidth and power requirements. T...
Vijay Chandramohan, Kenneth J. Christensen
ITC
1998
IEEE
104views Hardware» more  ITC 1998»
14 years 26 days ago
Built-in self-test of FPGA interconnect
: We introduce the first BIST approach for testing the programmable routing network in FPGAs. Our method detects opens in, and shorts among, wiring segments, and also faults affect...
Charles E. Stroud, Sajitha Wijesuriya, Carter Hami...
VLSID
2006
IEEE
140views VLSI» more  VLSID 2006»
14 years 9 months ago
Low Power Multilevel Interconnect Networks Using Wave-Pipelined Multiplexed (WPM) Routing
A low power multilevel interconnect architecture that uses wave-pipelined multiplexed (WPM) interconnect routing is proposed in this paper. WPM takes advantage of existing interco...
Ajay Joshi, Vinita V. Deodhar, Jeffrey A. Davis