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» Router designs for elastic buffer on-chip networks
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ICDCS
2006
IEEE
14 years 1 months ago
A Loss and Queuing-Delay Controller for Router Buffer Management
— Active queue management (AQM) in routers has been proposed as a solution to some of the scalability issues associated with TCP’s pure end-to-end approach to congestion contro...
Long Le, Kevin Jeffay, F. Donelson Smith
SIGCOMM
2004
ACM
14 years 24 days ago
Sizing router buffers
All Internet routers contain buffers to hold packets during times of congestion. Today, the size of the buffers is determined by the dynamics of TCP’s congestion control algor...
Guido Appenzeller, Isaac Keslassy, Nick McKeown
CCR
2005
103views more  CCR 2005»
13 years 7 months ago
Part II: control theory for buffer sizing
This article describes how control theory has been used to address the question of how to size the buffers in core Internet routers. Control theory aims to predict whether the net...
Gaurav Raina, Donald F. Towsley, Damon Wischik
ASPDAC
2009
ACM
141views Hardware» more  ASPDAC 2009»
13 years 11 months ago
Adaptive inter-router links for low-power, area-efficient and reliable Network-on-Chip (NoC) architectures
Abstract-- The increasing wire delay constraints in deep submicron VLSI designs have led to the emergence of scalable and modular Network-on-Chip (NoC) architectures. As the power ...
Avinash Karanth Kodi, Ashwini Sarathy, Ahmed Louri...
MICRO
2003
IEEE
99views Hardware» more  MICRO 2003»
14 years 19 days ago
Power-driven Design of Router Microarchitectures in On-chip Networks
As demand for bandwidth increases in systems-on-a-chip and chip multiprocessors, networks are fast replacing buses and dedicated wires as the pervasive interconnect fabric for on-...
Hangsheng Wang, Li-Shiuan Peh, Sharad Malik