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» SEP: Simulation framework to evaluate digital hardware archi...
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DATE
2005
IEEE
154views Hardware» more  DATE 2005»
14 years 1 months ago
Secure Embedded Processing through Hardware-Assisted Run-Time Monitoring
— Security is emerging as an important concern in embedded system design. The security of embedded systems is often compromised due to vulnerabilities in “trusted” software t...
Divya Arora, Srivaths Ravi, Anand Raghunathan, Nir...
VLSID
2006
IEEE
134views VLSI» more  VLSID 2006»
14 years 8 months ago
ADC Precision Requirement for Digital Ultra-Wideband Receivers with Sublinear Front-Ends: A Power and Performance Perspective
This paper presents the power and performance analysis of a digital, direct sequence ultra-wideband (DS-UWB) receiver operating in the 3 to 4 GHz band. The signal to noise and dis...
Ivan Siu-Chuang Lu, Neil Weste, Sri Parameswaran
ETS
2000
IEEE
126views Hardware» more  ETS 2000»
13 years 7 months ago
Dynamic Goal-Based Role-Play Simulation on the Web: A Case Study
This paper outlines and discusses the pedagogical approach, the technical design architecture, and an innovative implementation of a collaborative role-play simulation technology ...
Som Naidu, Albert Ip, Roni Linser
GECCO
2005
Springer
232views Optimization» more  GECCO 2005»
14 years 1 months ago
A hardware pipeline for function optimization using genetic algorithms
Genetic Algorithms (GAs) are very commonly used as function optimizers, basically due to their search capability. A number of different serial and parallel versions of GA exist. ...
Malay Kumar Pakhira, Rajat K. De
ICCAD
2001
IEEE
217views Hardware» more  ICCAD 2001»
14 years 4 months ago
ASF: A Practical Simulation-Based Methodology for the Synthesis of Custom Analog Circuits
: This paper describes ASF, a novel cell-level analog synthesis framework that can size and bias a given circuit topology subject to a set of performance objectives and a manufactu...
Michael Krasnicki, Rodney Phelps, James R. Hellums...