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» Sampling-rate-aware noise generation
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PATMOS
2005
Springer
14 years 1 months ago
A New Model for Timing Jitter Caused by Device Noise in Current-Mode Logic Frequency Dividers
A new method for predicting timing jitter caused by device noise in current-mode logic (CML) frequency dividers is presented. Device noise transformation into jitter is modeled as ...
Marko Aleksic, Nikola Nedovic, K. Wayne Current, V...
TMI
2008
142views more  TMI 2008»
13 years 7 months ago
Wavelet Based Noise Reduction in CT-Images Using Correlation Analysis
Abstract-- The projection data measured in computed tomography (CT) and, consequently, the slices reconstructed from these data are noisy. We present a new wavelet based structurep...
Anja Borsdorf, Rainer Raupach, Thomas Flohr, Joach...
ISCAS
2007
IEEE
164views Hardware» more  ISCAS 2007»
14 years 2 months ago
Noise Figure Measurement Using Mixed-Signal BIST
—A Built-In Self-Test (BIST) approach for functionality measurements, including noise figure (NF), linearity and frequency response of analog circuitry in mixedsignal systems, is...
Jie Qin, Charles E. Stroud, Foster F. Dai
CCECE
2006
IEEE
14 years 1 months ago
Error Performance of BICM-ID in Impulsive Noise
The application of bit-interleaved coded modulation with iterative decoding (BICM-ID) was recently considered to improve both the spectral efficiency and error performance in Cla...
Trung Q. Bui, Ha H. Nguyen
ISQED
2005
IEEE
95views Hardware» more  ISQED 2005»
14 years 1 months ago
Power Supply Noise-Aware Scheduling and Allocation for DSP Synthesis
As technology scales down, power supply noise is becoming a performance and reliability bottleneck in modern VLSI. We propose a power supply noise-aware design methodology for hig...
Dongku Kang, Yiran Chen, Kaushik Roy