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ISCA
2010
IEEE
199views Hardware» more  ISCA 2010»
14 years 15 days ago
A case for FAME: FPGA architecture model execution
Given the multicore microprocessor revolution, we argue that the architecture research community needs a dramatic increase in simulation capacity. We believe FPGA Architecture Mod...
Zhangxi Tan, Andrew Waterman, Henry Cook, Sarah Bi...
ICS
2009
Tsinghua U.
14 years 8 days ago
Dynamic task set partitioning based on balancing memory requirements to reduce power consumption
ABSTRACT Because of technology advances power consumption has emerged up as an important design issue in modern high-performance microprocessors. As a consequence, research on redu...
Diana Bautista, Julio Sahuquillo, Houcine Hassan, ...
HPCA
2000
IEEE
14 years 2 days ago
Evaluation of Active Disks for Decision Support Databases
Growth and usage trends for large decision support databases indicate that there is a need for architectures that scale the processing power as the dataset grows. To meet this nee...
Mustafa Uysal, Anurag Acharya, Joel H. Saltz
MOBICOM
2000
ACM
14 years 1 days ago
A scalable location service for geographic ad hoc routing
GLS is a new distributed location service which tracks mobile node locations. GLS combined with geographic forwarding allows the construction of ad hoc mobile networks that scale ...
Jinyang Li, John Jannotti, Douglas S. J. De Couto,...
ICPP
1999
IEEE
13 years 12 months ago
Multi-Capacity Bin Packing Algorithms with Applications to Job Scheduling under Multiple Constraints
In past massively parallel processing systems, such as the TMC CM-5 and the CRI T3E, the scheduling problem consisted of allocating a single type of resource among the waiting job...
William Leinberger, George Karypis, Vipin Kumar