173 search results - page 8 / 35 » Scan Architecture With Align-Encode |
DAC
1997
ACM
14 years 22 days ago
1997
ACM
An ATPG technique is proposed that reduces heat dissipation during testing of sequential circuits that have full-scan. The objective is to permit safe and inexpensive testing of l...
VLSID
2002
IEEE
14 years 9 months ago
2002
IEEE
We describe a built-in test pattern generation method for scan circuits. The method is based on partitioning and storage of test sets. Under this method, a precomputed test set is...
IPPS
2002
IEEE
14 years 1 months ago
2002
IEEE
In this paper we present new approaches to high performance protein database scanning on two novel massively parallel architectures to gain supercomputer power at low cost. The ï¬...
ICCD
2004
IEEE
14 years 5 months ago
2004
IEEE
Although scan-based designs are widely used in order to reduce the complexity of test generation, test application time and test data volume are substantially increased. We propos...
VMV
2003
13 years 10 months ago
2003
Precise digital 3D models of indoor environments are needed in several applications, e.g., facility management, architecture, rescue and inspection robotics. This paper presents a...