The relationship between two well established formalisms for temporal reasoning is first investigated, namely between Allen's interval algebra (or Allen's temporal logic,...
In this paper we present the Gain-based Logic Block Array (GLA), a new via-programmable regular fabric. GLA is an array of Gainbased Logic Blocks (GLBs). The GLB is a semi-univers...
Bo Hu, Hailin Jiang, Qinghua Liu, Malgorzata Marek...
This paper presents a novel synthesis algorithm that reduces the area needed for implementing multiplexers on an FPGA by an average of 18%. This is achieved by reducing the number...
We present an automatic logic synthesis method targeted for highperformance asynchronous FPGA (AFPGA) architectures. Our method transforms sequential programs as well as high-leve...
Information synthesis is a key portion of the analysis process with visual analytics tools. This stage of work requires users to collect, organize, and add meaning to individual a...