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DAC
1998
ACM
13 years 11 months ago
M32: A Constructive multilevel Logic Synthesis System
We describe a new constructive multilevel logic synthesis system that integrates the traditionally separate technology-independent and technology-dependent stages of modern synthe...
Victor N. Kravets, Karem A. Sakallah
CODES
2003
IEEE
14 years 25 days ago
A codesigned on-chip logic minimizer
Boolean logic minimization is traditionally used in logic synthesis tools running on powerful desktop computers. However, logic minimization has recently been proposed for dynamic...
Roman L. Lysecky, Frank Vahid
ICCAD
1998
IEEE
112views Hardware» more  ICCAD 1998»
13 years 11 months ago
Using precomputation in architecture and logic resynthesis
Abstract Althoughtremendousadvanceshave been accomplished in logic synthesis in the past two decades, in some cases logic synthesis still cannot attain the improvements possible by...
Soha Hassoun, Carl Ebeling
ISMVL
2003
IEEE
112views Hardware» more  ISMVL 2003»
14 years 24 days ago
Iterative Symmetry Indices Decomposition for Ternary Logic Synthesis in Three-Dimensional Space
This paper introduces the implementation of the Iterative Symmetry Indices Decomposition (ISID) for the synthesis of ternary threedimensional logic circuits. The synthesis of regu...
Anas Al-Rabadi
VLSID
2009
IEEE
130views VLSI» more  VLSID 2009»
14 years 8 months ago
Reversible Logic Synthesis with Output Permutation
Synthesis of reversible logic has become a very important research area. In recent years several algorithms ? heuristic as well as exact ones ? have been introduced in this area. ...
Daniel Große, Gerhard W. Dueck, Robert Wille...