Sciweavers

376 search results - page 23 / 76
» Self-Assembled Circuit Patterns
Sort
View
DFT
2005
IEEE
200views VLSI» more  DFT 2005»
14 years 1 months ago
Data Dependent Jitter (DDJ) Characterization Methodology
A new jitter model is developed using Matlab and Spice to analyze Data Dependent Jitter (DDJ) in serial data integrated circuits. The simulation results show that DDJ is dependent...
Kyung Ki Kim, Yong-Bin Kim, Fabrizio Lombardi
VLSID
2007
IEEE
142views VLSI» more  VLSID 2007»
14 years 8 months ago
Controllability-driven Power Virus Generation for Digital Circuits
The problem of peak power estimation in CMOS circuits is essential for analyzing the reliability and performance of circuits at extreme conditions. The Power Virus problem involves...
K. Najeeb, Karthik Gururaj, V. Kamakoti, Vivekanan...
VTS
1995
IEEE
100views Hardware» more  VTS 1995»
13 years 11 months ago
Transformed pseudo-random patterns for BIST
This paper presents a new approach for on-chip test pattern generation. The set of test patterns generated by a pseudo-random pattern generator (e.g., an LFSR) is transformed into...
Nur A. Touba, Edward J. McCluskey
HPCA
2009
IEEE
14 years 2 months ago
Reconciling specialization and flexibility through compound circuits
While parallelism and multi-cores are receiving much attention as a major scalability path, customization is another, orthogonal and complementary, scalability path which can targ...
Sami Yehia, Sylvain Girbal, Hugues Berry, Olivier ...
ICCAD
2002
IEEE
116views Hardware» more  ICCAD 2002»
14 years 4 months ago
Conflict driven techniques for improving deterministic test pattern generation
This work presents several new techniques for enhancing the performance of deterministic test pattern generation for VLSI circuits. The techniques introduced are called dynamic de...
Chen Wang, Sudhakar M. Reddy, Irith Pomeranz, Xiji...