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EMSOFT
2007
Springer
13 years 11 months ago
Necessary and sufficient conditions for deterministic desynchronization
Synchronous reactive formalisms associate concurrent behaviors to precise schedules on global clock(s). This allows a non-ambiguous notion of "absent" signal, which can ...
Dumitru Potop-Butucaru, Robert de Simone, Yves Sor...
DATE
2005
IEEE
143views Hardware» more  DATE 2005»
14 years 1 months ago
galsC: A Language for Event-Driven Embedded Systems
— We introduce galsC, a language designed for programming event-driven embedded systems such as sensor networks. galsC implements the TinyGALS programming model. At the local lev...
Elaine Cheong, Jie Liu
ISVLSI
2008
IEEE
173views VLSI» more  ISVLSI 2008»
14 years 2 months ago
Hermes-GLP: A GALS Network on Chip Router with Power Control Techniques
The evolution of deep submicron technologies allows the development of increasingly complex Systems on a Chip (SoC). However, this evolution is rendering less viable some well-est...
Julian J. H. Pontes, Matheus T. Moreira, Rafael So...
ISCAS
2006
IEEE
112views Hardware» more  ISCAS 2006»
14 years 1 months ago
Silicon neurons that inhibit to synchronize
Abstract—We present a silicon neuron that uses shunting inhibition (conductance-based) with a synaptic rise-time to achieve synchrony. Synaptic rise-time promotes synchrony by de...
John V. Arthur, Kwabena Boahen
CAV
2009
Springer
156views Hardware» more  CAV 2009»
14 years 2 months ago
Towards Performance Prediction of Compositional Models in Industrial GALS Designs
Systems and Networks on Chips (NoCs) are a prime design focus of many hardware manufacturers. In addition to functional verification, which is a difficult necessity, the chip desi...
Nicolas Coste, Holger Hermanns, Etienne Lantreibec...