605 search results - page 82 / 121 » Self-Timed Architecture of a Reduced Instruction Set Compute... |
DAC
2004
ACM
14 years 7 days ago
2004
ACM
This paper presents a method of generating tests for transition faults using tests for stuck-at faults such that the peak power is the minimum possible using a given set of tests ...
ICS
2001
Tsinghua U.
14 years 29 days ago
2001
Tsinghua U.
The caching behavior of multimedia applications has been described as having high instruction reference locality within small loops, very large working sets, and poor data cache p...
DAC
2003
ACM
14 years 1 months ago
2003
ACM
This paper presents a compact Nonlinear model Order Reduction Method (NORM) that is applicable for time-invariant and time-varying weakly nonlinear systems. NORM is suitable for r...
VLSID
2002
IEEE
14 years 8 months ago
2002
IEEE
The paper presents two new approaches to multiobjective design space exploration for parametric VLSI systems. Both considerably reduce the number of simulations needed to determin...
IISWC
2006
IEEE
14 years 2 months ago
2006
IEEE
— As x86-64 processors become the CPU of choice for the personal computer market, it becomes increasingly important to understand the performance we can expect by migrating appli...