In this paper we propose an on-chip bus PMU which makes accurate estimates of system power consumption from a first-order linear power model by utilizing system-level activity in...
Youngjin Cho, Younghyun Kim, Sangyoung Park, Naehy...
For many years, CMOS process scaling has allowed a steady increase in the operating frequency and integration density of integrated circuits. Only recently, however, have we reach...
Abstract— This paper introduces a fuzzy logic based guidance architecture to a graph grammar framework for automated design of analog circuits. The grammar generates circuit topo...
Abstract. We define and study an automata model of concurrent recursive programs. An automaton consists of a finite number of pushdown systems running in parallel and communicati...
Benedikt Bollig, Manuela-Lidia Grindei, Peter Habe...
In this paper, we present and analyze a novel decoder architecture for LDPC convolutional codes (LDPCCCs). The proposed architecture enables high throughput and can be programmed ...
Marcel Bimberg, Marcos B. S. Tavares, Emil Mat&uac...