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ICCAD
1994
IEEE
127views Hardware» more  ICCAD 1994»
14 years 29 days ago
Synthesis of concurrent system interface modules with automatic protocol conversion generation
-- We describe a new high-level compiler called Integral fordesigning system interface modules. The inputis a high-levelconcurrent algorithmic specification that can model complex ...
Bill Lin, Steven Vercauteren
ISSS
1995
IEEE
59views Hardware» more  ISSS 1995»
14 years 11 days ago
Multiple-process behavioral synthesis for mixed hardware-software systems
Systems composed of microprocessors interacting with ASICs are necessarily multiple-process systems, since the controller in the microprocessor is separate from any controllers on...
Jay K. Adams, Donald E. Thomas
PERCOM
2003
ACM
14 years 8 months ago
MACA-P: A MAC for Concurrent Transmissions in Multi-Hop Wireless Networks
: This paper presents the initial design and performance study of MACA-P, a RTS/CTS based MAC protocol that enables simultaneous transmissions in multihop ad-hoc wireless networks....
Arup Acharya, Archan Misra, Sorav Bansal
ADAEUROPE
2007
Springer
14 years 3 months ago
Modelling Remote Concurrency with Ada
When developing concurrent software, a proper engineering practice is to choose a good level of abstraction for expressing concurrency control. Ideally, this level should provide p...
Claude Kaiser, Christophe Pajault, Jean-Fran&ccedi...
JACM
2002
87views more  JACM 2002»
13 years 8 months ago
Bounded concurrent timestamp systems using vector clocks
Abstract. Shared registers are basic objects used as communication mediums in asynchronous concurrent computation. A concurrent timestamp system is a higher typed communication obj...
Sibsankar Haldar, Paul M. B. Vitányi