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» Sequential Circuits for Relational Analysis
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ICCAD
2005
IEEE
176views Hardware» more  ICCAD 2005»
14 years 6 months ago
Statistical gate sizing for timing yield optimization
— Variability in the chip design process has been relatively increasing with technology scaling to smaller dimensions. Using worst case analysis for circuit optimization severely...
Debjit Sinha, Narendra V. Shenoy, Hai Zhou
VLSID
2009
IEEE
155views VLSI» more  VLSID 2009»
14 years 10 months ago
Unified Challenges in Nano-CMOS High-Level Synthesis
: The challenges in nano-CMOS circuit design include the following: variability, leakage, power, thermals, reliability, and yield. This talk will focus on interdependent considerat...
Saraju P. Mohanty
LCPC
2009
Springer
14 years 2 months ago
A Balanced Approach to Application Performance Tuning
Abstract. Current hardware trends place increasing pressure on programmers and tools to optimize scientific code. Numerous tools and techniques exist, but no single tool is a pana...
Souad Koliai, Stéphane Zuckerman, Emmanuel ...
DATE
2010
IEEE
121views Hardware» more  DATE 2010»
14 years 2 months ago
Properties of and improvements to time-domain dynamic thermal analysis algorithms
—Temperature has a strong influence on integrated circuit (IC) performance, power consumption, and reliability. However, accurate thermal analysis can impose high computation co...
Xi Chen, Robert P. Dick, Li Shang
ICCAD
2002
IEEE
146views Hardware» more  ICCAD 2002»
14 years 6 months ago
Conflict driven learning in a quantified Boolean Satisfiability solver
Within the verification community, there has been a recent increase in interest in Quantified Boolean Formula evaluation (QBF) as many interesting sequential circuit verification ...
Lintao Zhang, Sharad Malik