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ICCAD
1997
IEEE
125views Hardware» more  ICCAD 1997»
13 years 12 months ago
A deductive technique for diagnosis of bridging faults
A deductive technique is presented that uses voltage testing for the diagnosis of single bridging faults between two gate input or output lines and is applicable to combinational ...
Srikanth Venkataraman, W. Kent Fuchs
ASPDAC
2004
ACM
151views Hardware» more  ASPDAC 2004»
14 years 1 months ago
Combinatorial group testing methods for the BIST diagnosis problem
— We examine an abstract formulation of BIST diagnosis in digital logic systems. The BIST diagnosis problem has applications that include identification of erroneous test vector...
Andrew B. Kahng, Sherief Reda
DFT
2003
IEEE
117views VLSI» more  DFT 2003»
14 years 28 days ago
Fault Tolerant Design of Combinational and Sequential Logic Based on a Parity Check Code
We describe a method for designing fault tolerant circuits based on an extension of a Concurrent Error Detection (CED) technique. The proposed extension combines parity check code...
Sobeeh Almukhaizim, Yiorgos Makris