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ICCD
2006
IEEE
113views Hardware» more  ICCD 2006»
16 years 1 months ago
A theory of Error-Rate Testing
— We have entered an era where chip yields are decreasing with scaling. A new concept called intelligible testing has been previously proposed with the goal of reversing this tre...
Shideh Shahidi, Sandeep Gupta
ICCAD
2004
IEEE
114views Hardware» more  ICCAD 2004»
16 years 1 months ago
High-level synthesis using computation-unit integrated memories
Abstract— High-level synthesis (HLS) of memory-intensive applications has featured several innovations in terms of enhancements made to the basic memory organization and data lay...
Chao Huang, Srivaths Ravi, Anand Raghunathan, Nira...
ICCAD
2004
IEEE
191views Hardware» more  ICCAD 2004»
16 years 1 months ago
Checking consistency of C and Verilog using predicate abstraction and induction
edicate Abstraction and Induction Edmund Clarke Daniel Kroening June 25, 2004 CMU-CS-04-131 School of Computer Science Carnegie Mellon University Pittsburgh, PA 15213 It is common...
Daniel Kroening, Edmund M. Clarke
ICCAD
2003
IEEE
148views Hardware» more  ICCAD 2003»
16 years 1 months ago
The Compositional Far Side of Image Computation
Symbolic image computation is the most fundamental computation in BDD-based sequential system optimization and formal verification. In this paper, we explore the use of over-appr...
Chao Wang, Gary D. Hachtel, Fabio Somenzi
CGO
2010
IEEE
15 years 11 months ago
Integrated instruction selection and register allocation for compact code generation exploiting freeform mixing of 16- and 32-bi
For memory constrained embedded systems code size is at least as important as performance. One way of increasing code density is to exploit compact instruction formats, e.g. ARM T...
Tobias J. K. Edler von Koch, Igor Böhm, Bj&ou...
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