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DATE
2002
IEEE
206views Hardware» more  DATE 2002»
14 years 14 days ago
Accurate Area and Delay Estimators for FPGAs
We present an area and delay estimator in the context of a compiler that takes in high level signal and image processing applications described in MATLAB and performs automatic de...
Anshuman Nayak, Malay Haldar, Alok N. Choudhary, P...
ICASSP
2010
IEEE
13 years 5 months ago
Learning from other subjects helps reducing Brain-Computer Interface calibration time
A major limitation of Brain-Computer Interfaces (BCI) is their long calibration time, as much data from the user must be collected in order to tune the BCI for this target user. I...
Fabien Lotte, Cuntai Guan
ICASSP
2009
IEEE
14 years 2 months ago
Joint MIMO radar waveform and receiving filter optimization
Abstract—The concept of MIMO (multiple-input multipleoutput) radar allows each transmitting antenna element to transmit an arbitrary waveform. This provides extra degrees of free...
Chun-Yang Chen, P. P. Vaidyanathan
DAC
2006
ACM
14 years 8 months ago
Transistor abstraction for the functional verification of FPGAs
or Abstraction for the Functional Verification of FPGAs Guy Dupenloup, Thierry Lemeunier, Roland Mayr Altera Corporation 101 Innovation Drive San Jose, CA 95134 1-408-544-8672 {gdu...
Guy Dupenloup, Thierry Lemeunier, Roland Mayr
ITC
2003
IEEE
148views Hardware» more  ITC 2003»
14 years 23 days ago
HyAC: A Hybrid Structural SAT Based ATPG for Crosstalk
As technology evolves into the deep sub-micron era, signal integrity problems are growing into a major challenge. An important source of signal integrity problems is the crosstalk...
Xiaoliang Bai, Sujit Dey, Angela Krstic