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IEEEPACT
2008
IEEE
14 years 3 months ago
2008
IEEE
The memory access limits the performance of stream processors. By exploiting the reuse of data held in the Stream Register File (SRF), an on-chip storage, the number of memory acc...
IEEEPACT
2009
IEEE
14 years 3 months ago
2009
IEEE
Abstract—Load elimination is a classical compiler transformation that is increasing in importance for multi-core and many-core architectures. The effect of the transformation is ...
CODES
2005
IEEE
14 years 2 months ago
2005
IEEE
Multimedia vector instruction sets are becoming ubiquitous in most of the embedded systems used for multimedia, networking and communications. However, current compiler technology...
IPPS
2005
IEEE
14 years 2 months ago
2005
IEEE
The problem of writing high performance parallel applications becomes even more challenging when irregular, sparse or adaptive methods are employed. In this paper we introduce com...
IPPS
2007
IEEE
14 years 2 months ago
2007
IEEE
Modern multi-core architectures have become popular because of the limitations of deep pipelines and heating and power concerns. Some of these multi-core architectures such as the...