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WSC
2007
14 years 4 days ago
A Bayesian approach to analysis of limit standards
Limit standards are probabilistic requirements or benchmarks regarding the proportion of replications conforming or not conforming to a desired threshold. Sample proportions resul...
Roy R. Creasey Jr., K. Preston White Jr.
DAC
2008
ACM
14 years 10 months ago
Multiprocessor performance estimation using hybrid simulation
With the growing number of programmable processing elements in today's MultiProcessor System-on-Chip (MPSoC) designs, the synergy required for the development of the hardware...
Lei Gao, Kingshuk Karuri, Stefan Kraemer, Rainer L...
DATE
2009
IEEE
168views Hardware» more  DATE 2009»
14 years 4 months ago
Selective state retention design using symbolic simulation
Abstract—Addressing both standby and active power is a major challenge in developing System-on-Chip designs for batterypowered products. Powering off sections of logic or memorie...
Ashish Darbari, Bashir M. Al-Hashimi, David Flynn,...
DATE
2005
IEEE
115views Hardware» more  DATE 2005»
14 years 3 months ago
An Infrastructure to Functionally Test Designs Generated by Compilers Targeting FPGAs
This paper presents an infrastructure to test the functionality of the specific architectures output by a highlevel compiler targeting dynamically reconfigurable hardware. It resu...
Rui Rodrigues, João M. P. Cardoso
ICANN
1997
Springer
14 years 1 months ago
On-Line Hebbian Learning for Spiking Neurons: Architecture of the Weight-Unit of NESPINN
: We present the implementation of on-line Hebbian learning for NESPINN, the Neurocomputer for the simulation of spiking neurons. In order to support various forms of Hebbian learn...
Ulrich Roth, Axel Jahnke, Heinrich Klar