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DSD
2010
IEEE
144views Hardware» more  DSD 2010»
13 years 8 months ago
On-chip Scan-Based Test Strategy for a Dependable Many-Core Processor Using a NoC as a Test Access Mechanism
—Periodic on-chip scan-based tests have to be applied to a many-core processor SoC to improve its dependability. An infrastructural IP module has been designed and incorporated i...
Xiao Zhang, Hans G. Kerkhoff, Bart Vermeulen
SIMPRA
2008
131views more  SIMPRA 2008»
13 years 8 months ago
Distributed simulation of DEVS and Cell-DEVS models in CD++ using Web-Services
: DEVS is a Modeling and Simulation formalism that has been widely used to study the dynamics of discrete event systems. Cell-DEVS is a DEVS-based formalism that defines spatial mo...
Gabriel A. Wainer, Rami Madhoun, Khaldoon Al-Zoubi
HPDC
2006
IEEE
14 years 2 months ago
Peer to peer size estimation in large and dynamic networks: A comparative study
As the size of distributed systems keeps growing, the peer to peer communication paradigm has been identified as the key to scalability. Peer to peer overlay networks are charact...
Erwan Le Merrer, Anne-Marie Kermarrec, Laurent Mas...
DATE
2008
IEEE
153views Hardware» more  DATE 2008»
14 years 3 months ago
An Optimized Message Passing Framework for Parallel Implementation of Signal Processing Applications
Novel reconfigurable computing platforms enable efficient realizations of complex signal processing applications by allowing exploitation of parallelization resulting in high thro...
Sankalita Saha, Jason Schlessman, Sebastian Puthen...
ICCD
2006
IEEE
157views Hardware» more  ICCD 2006»
14 years 5 months ago
Dynamic Co-Processor Architecture for Software Acceleration on CSoCs
By integrating one or more (hard or soft) CPU core on the chip, new generation platform FPGAs have become configurable systems on a chip (CSoC) that support a combined software an...
Abhishek Mitra, Zhi Guo, Anirban Banerjee, Walid A...