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GLVLSI
2003
IEEE
146views VLSI» more  GLVLSI 2003»
14 years 1 months ago
A practical CAD technique for reducing power/ground noise in DSM circuits
One of the fundamental problems in Deep Sub Micron (DSM) circuits is Simultaneous Switching Noise (SSN), which causes voltage fluctuations in the circuit power/ground networks. In...
Arindam Mukherjee, Krishna Reddy Dusety, Rajsaktis...
TMC
2012
11 years 10 months ago
Distributed Throughput Maximization in Wireless Networks via Random Power Allocation
—We develop a distributed throughput-optimal power allocation algorithm in wireless networks. The study of this problem has been limited due to the nonconvexity of the underlying...
Hyang-Won Lee, Eytan Modiano, Long Bao Le
EAAI
2006
189views more  EAAI 2006»
13 years 7 months ago
Evolutionary algorithms for VLSI multi-objective netlist partitioning
The problem of partitioning appears in several areas ranging from VLSI, parallel programming, to molecular biology. The interest in finding an optimal partition especially in VLSI ...
Sadiq M. Sait, Aiman H. El-Maleh, Raslan H. Al-Aba...
ICCD
2002
IEEE
115views Hardware» more  ICCD 2002»
14 years 4 months ago
Low-Power, High-Speed CMOS VLSI Design
Ubiquitous computing is a next generation information technology where computers and communications will be scaled further, merged together, and materialized in consumer applicati...
Tadahiro Kuroda
SBCCI
2005
ACM
132views VLSI» more  SBCCI 2005»
14 years 1 months ago
Design and power optimization of CMOS RF blocks operating in the moderate inversion region
In this work the design of radiofrequency CMOS circuit blocks in the 910MHz ISM band, while biasing the MOS transistor in the moderate inversion region, is analyzed. An amplifier ...
Leonardo Barboni, Rafaella Fiorelli