Sciweavers

320 search results - page 40 / 64
» Simulation based Development of Efficient Hardware for Sort ...
Sort
View
PARLE
1987
14 years 16 days ago
Emulating Digital Logic using Transputer Networks (very High Parallelism = Simplicity = Performance)
Modern VLSI technology has changed the economic rules by which the balance between processing power, memory and communications is decided in computing systems. This will have a pr...
Peter H. Welch
DATE
2003
IEEE
134views Hardware» more  DATE 2003»
14 years 2 months ago
A Multi-Level Design Flow for Incorporating IP Cores: Case Study of 1D Wavelet IP Integration
The design of high performance multimedia systems in a short time force us to use IP's blocks in many designs. However, their correct integration in a design implies more com...
Adel Baganne, Imed Bennour, Mehrez Elmarzougui, Ri...
JMM2
2006
219views more  JMM2 2006»
13 years 9 months ago
Fully Automatic Real-Time 3D Object Tracking using Active Contour and Appearance Models
This paper presents an efficient, robust and fully automatic real-time system for 3D object pose tracking in image sequences. The developed application integrates two main componen...
Giorgio Panin, Alois Knoll
JMLR
2002
160views more  JMLR 2002»
13 years 8 months ago
Kernel Independent Component Analysis
We present a class of algorithms for independent component analysis (ICA) which use contrast functions based on canonical correlations in a reproducing kernel Hilbert space. On th...
Francis R. Bach, Michael I. Jordan
VLSID
2001
IEEE
164views VLSI» more  VLSID 2001»
14 years 9 months ago
An Efficient Parallel Transparent Bist Method For Multiple Embedded Memory Buffers
In this paper, we propose a new transparent built-in self-test ( TBIST ) method to test multiple embedded memory arrays with various sizes in parallel. First, a new transparent tes...
Der-Cheng Huang, Wen-Ben Jone, Sunil R. Das