1304 search results - page 168 / 261 » Simulation of Soliton Circuits |
PATMOS
2005
Springer
14 years 2 months ago
2005
Springer
Abstract. Based on a previously reported request driven technique for Globally-Asynchronous Locally-Synchronous (GALS) circuits this paper presents two significant enhancements. Fi...
ISQED
2003
IEEE
14 years 2 months ago
2003
IEEE
In this paper, we evaluate the dependencies between tools, data and environment in process design kits, and present a framework for systematically analyzing the quality of the des...
GLVLSI
2000
IEEE
14 years 1 months ago
2000
IEEE
— Typically, placement algorithms attempt to minimize the total net length of a printed circuit board (PCB). However, an MCM’s increased throughput and dense circuitry can easi...
ASPDAC
1998
ACM
14 years 1 months ago
1998
ACM
-- The logic construction of a double-edge-triggered (DET) flip-flop, which can receive input signal at two levels of the clock, is analyzed and a new circuit design of CMOS DET fl...
ICCAD
1996
IEEE
14 years 1 months ago
1996
IEEE
The functional validation of a state-of-the-art digital design is usually performed by simulation of a register-transfer-level model. The degree to which the testvector suite cove...