65 search results - page 6 / 13 » Simultaneous Circuit Transformation and Routing |
ASPDAC
1998
ACM
13 years 12 months ago
1998
ACM
— This article describes an algorithm for curvilinear detailed routing. We significantly improved the average time performance of Gao’s algorithm by resolving its bottleneck r...
VLSID
2002
IEEE
14 years 8 months ago
2002
IEEE
Interconnect delay has become a critical factor in determining the performance of integrated circuits. Routing and buffering are powerful means of improving the circuit speed and ...
ISCAS
2005
IEEE
14 years 1 months ago
2005
IEEE
-- Timing optimization is an important goal of global routing in deep submicron era. To guarantee the timing performance of the circuit, merely adopting topology optimization becom...
ASPDAC
2005
ACM
13 years 9 months ago
2005
ACM
As the minimum feature sizes of VLSI circuits get smaller while the clock frequency increases, the effects of process variations become significant. We propose a UST/DME based ap...
ASPDAC
1998
ACM
13 years 12 months ago
1998
ACM
ABSTRACT - This paper presents a new design flow, FPDSiMPA, and a set of techniques for synthesizing high-performance sub-half micron logic circuits. FPD-SiMPA consists of logic p...