With aggressive reductions in feature sizes and the integration of multiple functionalities on the same die, bottlenecks due to I/O pin limitations have become a severe issue in to...
In this paper, we utilize Rent’s rule as an empirical measure for efficient clustering and placement of circuits on hierarchical FPGAs. We show that careful matching of design c...
Amit Singh, Ganapathy Parthasarathy, Malgorzata Ma...
We have implemented an aspect of learning and memory in the nervous system using analog electronics. Using a simple synaptic circuit we realize networks with Hebbian type adaptati...
With the increasing size and sophistication of circuits and specifically in the presence of IP blocks, new wirelength estimation methods are needed in the design flow of large-sca...
Taraneh Taghavi, Ani Nahapetian, Majid Sarrafzadeh
— While essential for high-performance circuit design, the custom nature of datapath components confines their use in only a few microprocessor companies. The reusability of dat...