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» Sizing Rules for Bipolar Analog Circuit Design
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DAC
2008
ACM
13 years 11 months ago
Topology synthesis of analog circuits based on adaptively generated building blocks
This paper presents an automated analog synthesis tool for topology generation and subsequent circuit sizing. Though sizing is indispensable, the paper mainly concentrates on topo...
Angan Das, Ranga Vemuri
ISPD
2005
ACM
239views Hardware» more  ISPD 2005»
14 years 3 months ago
Mapping algorithm for large-scale field programmable analog array
Modern advances in reconfigurable analog technologies are allowing field-programmable analog arrays (FPAAs) to dramatically grow in size, flexibility, and usefulness. With thes...
I. Faik Baskaya, Sasank Reddy, Sung Kyu Lim, Tyson...
ICCAD
1998
IEEE
95views Hardware» more  ICCAD 1998»
14 years 1 months ago
Efficient analog circuit synthesis with simultaneous yield and robustness optimization
This paper presents an efficient statistical design methodology that allows simultaneous sizing for performance and optimization for yield and robustness of analog circuits. The s...
Geert Debyser, Georges G. E. Gielen
GLVLSI
2003
IEEE
219views VLSI» more  GLVLSI 2003»
14 years 2 months ago
Buffer sizing for minimum energy-delay product by using an approximating polynomial
This paper first presents an accurate and efficient method of estimating the short circuit energy dissipation and the output transition time of CMOS buffers. Next the paper descri...
Chang Woo Kang, Soroush Abbaspour, Massoud Pedram
ISLPED
1996
ACM
83views Hardware» more  ISLPED 1996»
14 years 1 months ago
12-b 125 MSPS CMOS D/A designed for spectral performance
A 12-b 125 MSPS, digital to analog converter fabricated on a 0.6 micron single poly double metal CMOS process is presented. The design operates on supply voltages from 2.7 to 5.5 ...
Douglas Mercer, Larry Singer