Sciweavers

719 search results - page 16 / 144
» Sizing router buffers
Sort
View
124
Voted
VLSID
2002
IEEE
120views VLSI» more  VLSID 2002»
16 years 4 months ago
Floorplan Evaluation with Timing-Driven Global Wireplanning, Pin Assignment and Buffer/Wire Sizing
We describe a new algorithm for floorplan evaluation using timing-driven buffered routing according to a prescribed buffer site map. Specifically, we describe a provably good mult...
Christoph Albrecht, Andrew B. Kahng, Ion I. Mandoi...
127
Voted
TVLSI
2010
14 years 10 months ago
Discrete Buffer and Wire Sizing for Link-Based Non-Tree Clock Networks
Clock network is a vulnerable victim of variations as well as a main power consumer in many integrated circuits. Recently, link-based non-tree clock network attracts people's...
Rupak Samanta, Jiang Hu, Peng Li
135
Voted
JSAC
2011
123views more  JSAC 2011»
14 years 6 months ago
The Asymptotic Behavior of Minimum Buffer Size Requirements in Large P2P Streaming Networks
—The growth of real-time content streaming over the Internet has resulted in the use of peer-to-peer (P2P) approaches for scalable content delivery. In such P2P streaming systems...
Srinivas Shakkottai, R. Srikant, Lei Ying
ICCD
2001
IEEE
154views Hardware» more  ICCD 2001»
16 years 17 days ago
Performance Optimization By Wire and Buffer Sizing Under The Transmission Line Model
As the operating frequency increases to Giga Hertz and the rise time of a signal is less than or comparable to the time-of-flight delay of a line, it is necessary to consider the...
Tai-Chen Chen, Song-Ra Pan, Yao-Wen Chang
157
Voted
HIPEAC
2010
Springer
15 years 1 months ago
Buffer Sizing for Self-timed Stream Programs on Heterogeneous Distributed Memory Multiprocessors
Abstract. Stream programming is a promising way to expose concurrency to the compiler. A stream program is built from kernels that communicate only via point-to-point streams. The ...
Paul M. Carpenter, Alex Ramírez, Eduard Ayg...