1859 search results - page 199 / 372 » Sketch-based path design |
126
Voted
ICCD
2004
IEEE
16 years 17 days ago
2004
IEEE
Three dimensional vertically integrated systems allow active devices to be placed on multiple device layers. In recent years, a number of research efforts have addressed physical ...
111
Voted
ISPD
2010
ACM
15 years 10 months ago
2010
ACM
NBTI (Negative Bias Temperature Instability) has emerged as the dominant failure mechanism for PMOS in nanometer IC designs. However, its impact on one of the most important compo...
127
Voted
INFOCOM
2009
IEEE
15 years 10 months ago
2009
IEEE
—Valiant load balancing (VLB), also called two-stage load balancing, is gaining popularity as a routing scheme that can serve arbitrary traffic matrices. To date, VLB network de...
102
Voted
MICRO
2008
IEEE
15 years 10 months ago
2008
IEEE
Processors progressively age during their service life due to normal workload activity. Such aging results in gradually slower circuits. Anticipating this fact, designers add timi...
117
Voted
FPGA
2007
ACM
15 years 9 months ago
2007
ACM
Variations in the semiconductor fabrication process results in variability in parameters between transistors on the same die, a problem exacerbated by lithographic scaling. The re...