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AIEDAM
2006
89views more  AIEDAM 2006»
13 years 9 months ago
Design space exploration revisited
Design involves reasoning about descriptions of design artefacts, reasoning about design requirements and reasoning about design process objectives (such as keeping to deadlines an...
Pieter H. G. van Langen, Frances M. T. Brazier
DAC
2007
ACM
14 years 10 months ago
An Efficient Mechanism for Performance Optimization of Variable-Latency Designs
In many designs, the worst-case-delay path may never be exercised or may be exercised infrequently. For those designs, a strategy of optimizing a circuit for the worst-case condit...
Yu-Shih Su, Da-Chung Wang, Shih-Chieh Chang, Malgo...
IEICET
2006
114views more  IEICET 2006»
13 years 9 months ago
Synchronization Verification in System-Level Design with ILP Solvers
Concurrency is one of the most important issues in system-level design. Interleaving among parallel processes can cause an extremely large number of different behaviors, making de...
Thanyapat Sakunkonchak, Satoshi Komatsu, Masahiro ...
ASPDAC
2004
ACM
141views Hardware» more  ASPDAC 2004»
14 years 2 months ago
An approach for reducing dynamic power consumption in synchronous sequential digital designs
— The problem of minimizing dynamic power consumption by scaling down the supply voltage of computational elements off critical paths is widely addressed in the literature for th...
Noureddine Chabini, Wayne Wolf
DAC
2006
ACM
14 years 10 months ago
A new LP based incremental timing driven placement for high performance designs
In this paper, we propose a new linear programming based timing driven placement framework for high performance designs. Our LP framework is mainly net-based, but it takes advanta...
Tao Luo, David Newmark, David Z. Pan