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ICALP
2010
Springer
14 years 1 months ago
Network Design via Core Detouring for Problems without a Core
Some of the currently best-known approximation algorithms for network design are based on random sampling. One of the key steps of such algorithms is connecting a set of source nod...
Fabrizio Grandoni, Thomas Rothvoß
FPGA
2010
ACM
191views FPGA» more  FPGA 2010»
14 years 3 months ago
Voter insertion algorithms for FPGA designs using triple modular redundancy
Triple Modular Redundancy (TMR) is a common reliability technique for mitigating single event upsets (SEUs) in FPGA designs operating in radiation environments. For FPGA systems t...
Jonathan M. Johnson, Michael J. Wirthlin
VAMOS
2007
Springer
14 years 3 months ago
Requirements Modelling and Design Notations for Software Product Lines
Although feature modelling is a frequently used approach to the task of modelling commonality and variability within product lines, there is currently no standard modelling notati...
T. John Brown, Rachel Gawley, Ivor T. A. Spence, P...
DAC
2008
ACM
14 years 10 months ago
Robust chip-level clock tree synthesis for SOC designs
A key problem that arises in System-on-a-Chip (SOC) designs of today is the Chip-level Clock Tree Synthesis (CCTS). CCTS is done by merging all the clock trees belonging to differ...
Anand Rajaram, David Z. Pan
DAC
1999
ACM
14 years 1 months ago
Mixed-Vth (MVT) CMOS Circuit Design Methodology for Low Power Applications
Dual threshold technique has been proposed to reduce leakage power in low voltage and low power circuits by applying a high threshold voltage to some transistors in non-critical p...
Liqiong Wei, Zhanping Chen, Kaushik Roy, Yibin Ye,...