3507 search results - page 32 / 702 » Slicing for architectural analysis |
DATE
2006
IEEE
14 years 4 months ago
2006
IEEE
We propose instruction-driven slicing, a new technique for annotating microprocessor descriptions at the Register Transfer Level (RTL) in order to achieve lower power dissipation....
CHES
2003
Springer
14 years 4 months ago
2003
Springer
Abstract. In this paper a compact FPGA architecture for the AES algorithm with 128-bit key targeted for low-cost embedded applications is presented. Encryption, decryption and key ...
FPL
2008
Springer
14 years 8 days ago
2008
Springer
Exploiting the underutilisation of variable-length DSP algorithms during normal operation is vital, when seeking to maximise the achievable functionality of an application within ...
BMCBI
2010
13 years 8 months ago
2010
Background: To exploit the flood of data from advances in high throughput imaging of optically sectioned nuclei, image analysis methods need to correctly detect thousands of nucle...
DAC
2006
ACM
14 years 4 months ago
2006
ACM