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» Soft Scheduling in High Level Synthesis
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DAC
1999
ACM
14 years 11 months ago
Soft Scheduling in High Level Synthesis
In this paper, we establish a theoretical framework for a new concept of scheduling called soft scheduling. In contrasts to the traditional schedulers referred as hard schedulers,...
Jianwen Zhu, Daniel Gajski
DATE
2002
IEEE
105views Hardware» more  DATE 2002»
14 years 3 months ago
Power-Manageable Scheduling Technique for Control Dominated High-Level Synthesis
Optimizing power consumption at high-level is a critical step towards power-efficient digital system designs. This paper addresses the power management problem by scheduling a giv...
Chunhong Chen, Majid Sarrafzadeh
DATE
1998
IEEE
109views Hardware» more  DATE 1998»
14 years 3 months ago
Cross-Level Hierarchical High-Level Synthesis
This paper presents a new approach to cross-level hierarchical high-level synthesis. A methodology is presented, that supports the efficient synthesis of hierarchical specified sy...
Oliver Bringmann, Wolfgang Rosenstiel
VLSID
1994
IEEE
124views VLSI» more  VLSID 1994»
14 years 3 months ago
ILP-Based Scheduling with Time and Resource Constraints in High Level Synthesis
In this paper, we present a formal analysis of the constraints of the scheduling problem, and evaluate the structure of the scheduling polytope described by those constraints. Pol...
Samit Chaudhuri, Robert A. Walker
DATE
2005
IEEE
91views Hardware» more  DATE 2005»
14 years 4 months ago
Reliability-Centric High-Level Synthesis
Importance of addressing soft errors in both safety critical applications and commercial consumer products is increasing, mainly due to ever shrinking geometries, higher-density c...
Suleyman Tosun, Nazanin Mansouri, Ercument Arvas, ...