155 search results - page 19 / 31 » Soft delay error analysis in logic circuits |
IOLTS
2008
IEEE
14 years 2 months ago
2008
IEEE
Present and future semiconductor technologies are characterized by increasing parameters variations as well as an increasing susceptibility to external disturbances. Transient err...
ISCAS
2003
IEEE
14 years 29 days ago
2003
IEEE
Tunneling based random-access memories (TRAM’s) have recently garnered a great amount of interests among the memory designers due to their intrinsic merits such as reduced power...
DATE
2006
IEEE
14 years 1 months ago
2006
IEEE
In this paper we present a method which allows the statistical analysis of nanoelectronic Boolean networks with respect to timing uncertainty and noise. All signals are considered...
DAC
2003
ACM
14 years 8 months ago
2003
ACM
Noise affects circuit operation by increasing gate delays and causing latches to capture incorrect values. This paper proposes a method of characterizing correlation of signal tra...
ISLPED
2009
ACM
14 years 11 days ago
2009
ACM
We present experimental analysis to exploit the sequence dependence on energy saving in error tolerant image processing. Our analysis shows that the error distributions depend not...