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CODES
2007
IEEE
13 years 11 months ago
Influence of procedure cloning on WCET prediction
For the worst-case execution time (WCET) analysis, especially loops are an inherent source of unpredictability and loss of precision. This is caused by the difficulty to obtain sa...
Paul Lokuciejewski, Heiko Falk, Martin Schwarzer, ...
CODES
2004
IEEE
13 years 11 months ago
Fast exploration of bus-based on-chip communication architectures
As a result of improvements in process technology, more and more components are being integrated into a single System-on-Chip (SoC) design. Communication between these components ...
Sudeep Pasricha, Nikil D. Dutt, Mohamed Ben-Romdha...
CODES
2004
IEEE
13 years 11 months ago
Power analysis of system-level on-chip communication architectures
For complex System-on-chips (SoCs) fabricated in nanometer technologies, the system-level on-chip communication architecture is emerging as a significant source of power consumpti...
Kanishka Lahiri, Anand Raghunathan
ENGL
2008
186views more  ENGL 2008»
13 years 7 months ago
High Performance Monte-Carlo Based Option Pricing on FPGAs
High performance computing is becoming increasingly important in the field of financial computing, as the complexity of financial models continues to increase. Many of these financ...
Xiang Tian, Khaled Benkrid, Xiaochen Gu
TASE
2008
IEEE
13 years 7 months ago
On Clamping Planning in Workpiece-Fixture Systems
Deformation at contacts between the workpiece and locators/clamps resulting from large contact forces causes overall workpiece displacement, and affects the localization accuracy o...
Caihua Xiong, Michael Yu Wang, You-Lun Xiong