596 search results - page 110 / 120 » Software transactional memory for multicore embedded systems |
CODES
2005
IEEE
14 years 1 months ago
2005
IEEE
This paper proposes a new efficient buffer management technique called shift buffering for automatic code synthesis from synchronous dataflow graphs (SDF). Two previous buffer man...
CASES
2007
ACM
13 years 11 months ago
2007
ACM
For memory constrained environments like embedded systems, optimization for program size is often as important, if not more important, as optimization for execution speed. Commonl...
LCTRTS
2009
Springer
14 years 2 months ago
2009
Springer
Register file (RF) is extremely vulnerable to soft errors, and traditional redundancy based schemes to protect the RF are prohibitive not only because RF is often in the timing c...
ISCA
2010
IEEE
14 years 12 days ago
2010
IEEE
Given the multicore microprocessor revolution, we argue that the architecture research community needs a dramatic increase in simulation capacity. We believe FPGA Architecture Mod...
SAC
2008
ACM
13 years 7 months ago
2008
ACM
In this paper, we present the idea of offline count-limited certificates (or clics for short), and show how these can be implemented using minimal trusted hardware functionality a...