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» Some Experiments with the Performance of LAMP Architecture
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HPCA
2007
IEEE
14 years 7 months ago
A Memory-Level Parallelism Aware Fetch Policy for SMT Processors
A thread executing on a simultaneous multithreading (SMT) processor that experiences a long-latency load will eventually stall while holding execution resources. Existing long-lat...
Stijn Eyerman, Lieven Eeckhout
ICAS
2009
IEEE
138views Robotics» more  ICAS 2009»
14 years 2 months ago
An Assessment of Self-Managed P2P Streaming
Peer-to-Peer (P2P) IPTV applications have increasingly been considered as a potential approach to online broadcasting. These overcome fundamental client-server issues and introduc...
Majed Alhaisoni, Antonio Liotta, Mohammed Ghanbari
SASP
2009
IEEE
222views Hardware» more  SASP 2009»
14 years 2 months ago
A memory optimization technique for software-managed scratchpad memory in GPUs
—With the appearance of massively parallel and inexpensive platforms such as the G80 generation of NVIDIA GPUs, more real-life applications will be designed or ported to these pl...
Maryam Moazeni, Alex A. T. Bui, Majid Sarrafzadeh
FPGA
2003
ACM
117views FPGA» more  FPGA 2003»
14 years 21 days ago
Reducing pin and area overhead in fault-tolerant FPGA-based designs
This paper proposes a new high-level technique for designing fault tolerant systems in SRAM-based FPGAs, without modifications in the FPGA architecture. Traditionally, TMR has bee...
Fernanda Lima, Luigi Carro, Ricardo Augusto da Luz...
CONTEXT
2001
Springer
14 years 3 hour ago
A Connectionist-Symbolic Approach to Modeling Agent Behavior: Neural Networks Grouped by Contexts
A recent report by the National Research Council (NRC) declares neural networks “hold the most promise for providing powerful learning models”. While some researchers have expe...
Amy E. Henninger, Avelino J. Gonzalez, Michael Geo...