47 search results - page 3 / 10 » Speeding Up Evaluation of Powers and Monomials |
WLP
2005
Springer
14 years 1 months ago
2005
Springer
Constraint Propagation can be speeded up significantly by choosing a good execution order for propagators. A propagator is an implicit representation of a constraint which is wide...
MM
2004
ACM
14 years 1 months ago
2004
ACM
This paper presents the design, implementation, and evaluation of a practical voltage scaling (PDVS) algorithm for mobile devices primarily running multimedia applications. PDVS s...
AAAI
1994
13 years 9 months ago
1994
The paper evaluates the eectiveness of learning for speeding up the solution of constraint satisfaction problems. It extends previous work (Dechter 1990) by introducing a new and ...
ISQED
2006
IEEE
14 years 1 months ago
2006
IEEE
— A new low voltage swing circuit technique based on a dual threshold voltage CMOS technology is presented in this paper for simultaneously reducing active and standby mode power...
HPCA
2005
IEEE
14 years 1 months ago
2005
IEEE
Future high-performance billion-transistor processors are likely to employ partitioned architectures to achieve high clock speeds, high parallelism, low design complexity, and low...